Analysis of Performance Bottlenecks in Multithreaded Multiprocessor Systems

Issue title: Application of Concurrency to System Design

Article type: Research Article

Authors: Zuberek, W.M.

Affiliations: Department of Computer Science, Memorial University of Nfld, St.John's, Canada A1B 3X5

Abstract: The performance of modern multiprocessor systems is often limited by the delays of interconnections or long latencies of memory subsystems. Instruction-level multithreading is a technique to tolerate such long latencies by switching from one instruction thread to another and continuing instruction execution concurrently with the long-latency operations. Using timed Petri net models, the paper analyzes performance limitations introduced by different components of distributed-memory multithreaded multiprocessor systems. Simulation results are used to compare performance improvements obtained by replicating critical components of the system to those obtained using components with better performance characteristics.

Keywords: Instruction-level multithreading, distributed-memory multiprocessor systems, timed Petri nets, performance analysis, performance bottlenecks, event-driven simulation

Journal: Fundamenta Informaticae, vol. 50, no. 2, pp. 223-241, 2002