Core for Large Datasets: Rough Sets on FPGA

Issue title: Concurrency, Specification, and Programming: Special Issue of Selected Papers of CS&P 2015

Guest editors: Ludwik Czaja, Wojciech Penczek and Krzysztof Stencel

Article type: Research Article

Authors: Kopczyński, Maciej | Grześ, Tomasz | Stepaniuk, Jarosław^*

Affiliations: Faculty of Computer Science, Bialystok University of Technology, Wiejska 45A, 15-351 Bialystok, Poland. m.kopczynski@pb.edu.pl, t.grzes@pb.edu.pl, j.stepaniuk@pb.edu.pl

Correspondence: [*] Address for correspondence: Faculty of Computer Science, Bialystok University of Technology, Wiejska 45A, 15-351 Bialystok, Poland

Abstract: This paper presents FPGA and softcore CPU based device for large datasets core calculation using rough set methods. Presented architectures have been tested on two real datasets by downloading and running presented solutions inside FPGA. Tested datasets had 1 000 to 10 000 000 objects. The same operations were performed in software implementation. Obtained results show the big acceleration in computation time using hardware supporting core generation in comparison to pure software implementation.

DOI: 10.3233/FI-2016-1407

Journal: Fundamenta Informaticae, vol. 147, no. 2-3, pp. 241-259, 2016