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This journal publishes papers on a number of topics ranging from design to practical experiences with operational high performance/speed networks.
The topics covered will include but not be limited to:
- Communication network architectures
- Evolutionary networking protocols, services and architectures
- Network Security
Authors: Khan, Mohammad Ayoub | Ansari, Abdul Quaiyum
Article Type: Research Article
Abstract: The conventional two-dimensional (2-D) integrated circuit (IC) has limited scope for floor planning and therefore limits the performance improvements resulting from the Network-on-Chip (NoC) paradigm. The arrangement of 3-D also offers opportunities for new circuit architecture based on the geometric capacity that provide greater numbers of interconnections among multi-layer active circuits. The emerging 3-D VLSI Integration and process technologies allow the new design opportunities in 3-D NoC. The 3-D NoC can reduce significant amount of wire length for local and global interconnects. The role of bus and arbitration logic is equally important in the design of NoC. The performance of …the traditional bus is degraded by the increasing number of processing elements and transaction oriented model [On-Chip Communication Architectures, Morgan Kaufmann, 2008]. This has attracted much attention for applying wireless network protocols as CDMA, TDMA, dTDMA, etc. in SoC. The TDMA systems use a fixed number of timeslot. This protocol wastes bandwidth when some timeslots are allocated but not used. The dynamic TDMA (dTDMA) bus arbiter dynamically grows and shrinks the number of timeslots to match the number of active transmitters [in: VLSI Design, 2006. Held jointly with 5th International Conference on Embedded Systems and Design, 19th International Conference on, January 2006, p. 8]. In this paper, we present a design of high-speed switch and layer arbiter for inter-layer communications in 3-D Network-on-Chip. We have developed a Register Transfer Logic (RTL) level simulation model to evaluate the performance of proposed arbiter. A 640-bit message with uniform random destination data pattern was injected per IP per machine clock cycle. The worst case latency for the proposed design is 35 clock cycles. The presented architecture demonstrates their superior functionality in terms of speed and latency compared with existing implementation. The design is synthesized using 0.18 micron TSMC Technology [Taiwan Semiconductor Manufacturing Company, Ltd, 2011]. Show more
Keywords: SoC, NoC, dTDMA, arbitration, low-power, 3-D NoC
DOI: 10.3233/JHS-2012-0448
Citation: Journal of High Speed Networks, vol. 18, no. 3, pp. 141-155, 2012
Authors: Ahmad, Iftekhar | Habibi, Daryoush
Article Type: Research Article
Abstract: WiMAX technology has emerged as an exciting technology for next generation broadband wireless network with promises to offer high throughput and long coverage. WiMAX, however, has yet to prove its merits when the wireless nodes are not fixed and move at high vehicular speeds. Recent studies suggest that WiMAX offers limited throughput when a mobile node travels at vehicular speeds. Multipath fading causes high bit error rates at the receiver and is considered the main reason behind low throughput at high vehicular speeds. Bit error rates and maximum packet size govern the packet error rates, and error recovery for higher …number of corrupted packets is not an attractive option for many real-time applications with tight delay and jitter constraints. In this paper, we present a mathematical model for estimating bit error rates in WiMAX communication at vehicular speeds. The estimated bit error probability is taken into account for proactively computing an optimum packet size that offers the best chance of achieving improved throughput. We further propose a model that can be used to increase the utility of real-time wireless applications (e.g., video surveillance systems in public train) based on the knowledge of estimated transmission rates. We simulated the proposed and other standard schemes for a centralized video surveillance system in a public train where the train moves at high speeds and sends real-time video data to a central control room through wireless channels. The results show that the proposed scheme achieves significantly higher throughput, lower jitter and higher utility gain compared to the standard schemes. Show more
Keywords: WiMAX communication, vehicular speeds, throughput, utility
DOI: 10.3233/JHS-2012-0449
Citation: Journal of High Speed Networks, vol. 18, no. 3, pp. 157-171, 2012
Authors: Abuhaija, Belal
Article Type: Research Article
Abstract: Long Term Evolution (LTE) technology is becoming the de-facto NGN mobile access network. In order to deliver multimedia contents and services, higher data rates and low latency is required. The new planned LTE base stations can deliver on high data throughput at lower latency than available cellular networks. However, this deployment comes at an increased complexity of radio resources scheduling and power allocations. More than one half of the network operating cost comes from electrical energy. Therefore, one aim of the network operators is to reduce cellular networks power consumption. In this paper, a simulation study of three proposed scheduling …algorithms are studied under base station flat power spectrum constraints. LTE cell deployment is evaluated and analyzed to maximize cell throughput, while preventing cell edge customers from starvation. Studying the performance of flat cell power requirements, cell coverage, resource scheduling and maximum throughput is another aim of this paper. Average service mean time is a concept we introduce as a measure of the system efficiency. Show more
Keywords: Power consumption in LTE, flat power spectrum, LTE throughput
DOI: 10.3233/JHS-2012-0453
Citation: Journal of High Speed Networks, vol. 18, no. 3, pp. 173-184, 2012
Article Type: Research Article
Abstract: In this paper, we present a new hybrid protection and restoration scheme to handle two-link failure in WDM mesh networks. Some existing schemes for handling two-link failure use two backup paths to protect each demand or each link. Others reprovision backup paths for affected demands after the first link failure. Our hybrid scheme is more capacity efficient than previous schemes while being able to protect most of the demands upon two-link failure. The protection component of our hybrid scheme reserves backup capacity intelligently to ensure the majority of the affected demands can be restored using pre-planned backup paths upon two-link …failure. For the rest of the affected demands, the restoration component of our hybrid scheme dynamically finds new backup paths to quickly restore them. The capacity efficiency and protection/restoration capability of our hybrid scheme are demonstrated through numerical results. Show more
Keywords: Protection, restoration, two-link failure, WDM mesh networks
DOI: 10.3233/JHS-2012-0454
Citation: Journal of High Speed Networks, vol. 18, no. 3, pp. 185-195, 2012
Authors: Bhajantri, Lokesh B. | Nalini, N.
Article Type: Research Article
Abstract: A Distributed Sensor Networks (DSNs) can provide access to information anytime, anywhere by collecting, processing, analyzing and disseminating data. Thus, the network actively participates in creating a smart environment. DSNs promise to revolutionize sensing in a wide range of application domains. This is because of their reliability, accuracy, flexibility, cost effectiveness and ease of deployment of nodes in topology of DSN. Smart sensors can offer vigilant surveillance and can detect and collect data concerning any sign of machines failure, earthquakes, floods and even a terrorist attack. Energy efficiency, topology control and fault-tolerance are the most important issues in the development …of next-generation DSNs. Fault tolerance is the ability of a system to deliver a desired level of functionality in presence of faults in the topology. Topology control as a low level service governs communication among all nodes and is hence the primary target for increasing connectivity and saving energy. In this work, we have proposed two models for fault detection and fault recovery to achieve fault tolerance in topology. The proposed fault detection model is used to detect faults at node level (checking nodes energy) and network level faults (link failure and packet error). The proposed fault recovery model is used to achieve fault tolerance by adjusting the topology of the randomly deployed sensor nodes based on energy aware of nodes. Finally, we have evaluated the performance parameters for the proposed scheme. Show more
Keywords: Fault tolerance, topology control, fault detection, fault recovery, Routing and Distributed Sensor Networks (DSNs)
DOI: 10.3233/JHS-2012-0455
Citation: Journal of High Speed Networks, vol. 18, no. 3, pp. 197-210, 2012
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