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Issue title: Complexity in Scalable Computing
Article type: Research Article
Authors: Nielsen, Ida M.B. | Janssen, Curtis L.;
Affiliations: Sandia National Laboratories, P.O. Box 969, Livermore, CA 94551, USA
Note: [] Corresponding author. E-mail: cljanss@sandia.gov.
Abstract: Until recently, performance gains in processors were achieved largely by improvements in clock speeds and instruction level parallelism. Thus, applications could obtain performance increases with relatively minor changes by upgrading to the latest generation of computing hardware. Currently, however, processor performance improvements are realized by using multicore technology and hardware support for multiple threads within each core, and taking full advantage of this technology to improve the performance of applications requires exposure of extreme levels of software parallelism. We will here discuss the architecture of parallel computers constructed from many multicore chips as well as techniques for managing the complexity of programming such computers, including the hybrid message-passing/multi-threading programming model. We will illustrate these ideas with a hybrid distributed memory matrix multiply and a quantum chemistry algorithm for energy computation using Møller–Plesset perturbation theory.
Keywords: Multicore technology, hybrid programming model, multi-threading, message-passing, matrix multiplay
DOI: 10.3233/SPR-2008-0260
Journal: Scientific Programming, vol. 16, no. 4, pp. 277-285, 2008
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