An Intelligent Architecture for ATM Traffic Congestion Control

Article type: Research Article

Authors: Jang, Wook-Jin | Byun, Joonbum | Hambaba, Mohamed L.

Affiliations: Intelligent Systems Laboratory, EECS Dept., Stevens Institute of Technology, Hoboken, NJ 07030 | Computer, Information, and Systems Engineering (CISE) Dept., College of Engineering, San Jose State University, San Jose, CA 95192-0205. E-mail: mhambaba@vaxa.stevens-tech.edu

Abstract: An asynchronous transfer mode (ATM) network is a high-speed multimedia network that handles various kinds of traffic with different bit rates and different qualities of services (QoS). To maintain QoS for each traffic source and to avoid a possible congestion problem, an ATM network requires highly sophisticated and flexible controllers to insure that the demanding performance can be achieved under unexpected changes in traffic conditions. In this article we propose an intelligent architecture using neural networks for traffic congestion control in an ATM network. The congestion control using neural networks is suitable for an ATM because neural networks can learn the offered traffic characteristics and the dynamic changes of the traffic. The proposed mechanism is based on the adaptive prediction of the future value of the offered traffic and the flow rate for each traffic source. At every given time slot, the controllers in the proposed architecture predict whether the congestion will happen or not and regulate the volume of input traffic for each traffic source before the congestion happens, maintaining the user-required QoS for each traffic source based on the predefined rules. Consequently, the mechanism guarantees the QoS for each traffic source and efficiently prevents congestion.

DOI: 10.3233/IFS-1997-5206

Journal: Journal of Intelligent and Fuzzy Systems, vol. 5, no. 2, pp. 155-165, 1997