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Article type: Research Article
Authors: Sholander, Peter E.; | Owen, Henry L.;
Affiliations: School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA 30332-0250, USA
Note: [] Present address: Sandia National Labs, Albuquerque, NM 87185, USA.
Note: [] Corresponding author. Tel.: +1 404 894 4126; Fax: +1 404 894 9959; E-mail: henry.owen@eecom.gatech.edu
Abstract: Pointer processors in Synchronous Optical Networks (SONET)/Synchronous Digital Hierarchy Networks (SDH) may be placed into three categories: fixed threshold pointer processors, adaptive threshold modulation pointer processors and uniform pointer processors. Fixed threshold pointer processors produce gapped pointer sequences during SONET/SDH holdover mode when one or more node's clock has lost its synchronization reference. These gapped pointer sequences cause mapping wander in the underlying PDH payloads. This wander has motivated the development of uniform pointer processors which reduce/remove the gaps caused by the STM-n, AU and TU overhead bytes. However, uniform pointer processors cannot remove the additional gapped pointer effects caused by the VC overhead bytes. This paper reviews previous mathematical analysis and simulation results for SDH networks which use fixed threshold pointer processors to transport E1 PDH payloads in VC-12. That analysis is then extended to SDH networks which transpOlt DSl in VC-11. Next, a uniform pointer processor algorithm is proposed for the case where VC-12 transports an E1 rate PDH payload. Finally, a lower bound on the Maximum Time Interval Error (MTIE) that can be achieved with a uniform pointer processor is calculated.
Keywords: Synchronous Digital Hierarchy, Synchronous Optical Network, uniform pointer processor, network synchronization, network jitter minimization
DOI: 10.3233/JHS-1997-6104
Journal: Journal of High Speed Networks, vol. 6, no. 1, pp. 53-65, 1997
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