FPGA-based ROM-free network intrusion detection using shift-OR circuit

Issue title: Design and Optimization for High Performance Embedded Systems

Article type: Research Article

Authors: Hwang, Wen-Jyi | Roan, Huang-Chun | Shih, Ying-Nan | Lo, Chia-Tien Dan | Ou, Chien-Min

Affiliations: Department of Computer Science and Information Engineering, National Taiwan Normal University, Taipei, 117, Taiwan | Department of Computer Science, University of Texas at San Antonio, San Antonio, TX 78249, USA | Department of Electronics Engineering, Ching Yun University, Chungli, 320, Taiwan

Note: [] Corresponding author: Department of Computer Science and Information Engineering, National Taiwan Normal University, No.~88, Sec.4, Ting-Chow Rd, Taipei, 117, Taiwan. Tel.: +886 2 2932 2411 201; Fax: +886 2 2932 2378; E-mail: whwang@ntnu.edu.tw

Abstract: This paper introduces a novel FPGA-based signature match co-processor that can serve as the core of a hardware-based network intrusion detection system (NIDS). The co-processor is based on simple shift registers and bitmap encoders for the efficient signature match in hardware. As compared with related work, experimental results show that the proposed work achieves higher throughput and less hardware resource in the FPGA implementations of NIDS systems.

Keywords: Network intrusion detection system, FPGA implementation, pattern matching, Shift-Or algorithm, string searching

DOI: 10.3233/JEC-2009-0083

Journal: Journal of Embedded Computing, vol. 3, no. 2, pp. 99-107, 2009