Exploiting loop behavior for data cache leakage reduction

Issue title: Cache exploitation in embedded systems

Article type: Research Article

Authors: Zhang, Wei

Affiliations: Department of Electrical and Computer Engineering, Southern Illinois University Carbondale, Carbondale, IL 62901

Note: [] Corresponding author. E-mail: zhang@engr.siu.edu

Abstract: Leakage energy reduction for caches has been the target of many recent research efforts. In this work, we propose a novel compiler directed approach to reduce the data cache leakage energy by exploiting the program behavior. The proposed approach is based on the observation that only a small portion of the data are active at runtime and the program spends a lot of time in loops, so a large portion of data cache lines, which are not accessed by the loop, can be placed into the leakage control mode to reduce leakage energy consumption. The compiler-directed approach does not require hardware counters to monitor the access patterns of the cache lines and it is adaptive to the program behavior. The experimental results show that the compiler-directed approach is very competitive in terms of energy consumption and energy delay product, compared to the recently proposed pure hardware based approach. We also show that the utilization of loop transformations can increase the effectiveness of our strategy.

Keywords: Data cache, leakage energy optimization, loop analysis, drowsy cache

Journal: Journal of Embedded Computing, vol. 1, no. 4, pp. 501-508, 2005