Integrating functional and power simulation in embedded systems design

Issue title: Low-power Embedded Systems

Article type: Research Article

Authors: Ayala, José L. | López-Vallejo, Marisa

Affiliations: Departamento de Ingeniería Electrónica, E.T.S.I.Telecomunicación, Universidad Politécnica de Madrid, 28040 Madrid, Spain

Note: [] Corresponding author. E-mail: jayala@die.upm.es

Abstract: This paper presents the design and use of INCAPE (INtegrated Cache Analysis and Power Estimation). The proposed tool integrates an extended analytical model for power estimation in caches within a retargetable cross-design environment. INCAPE has been used to perform experimental design space exploration and analysis of the main factors that strongly impact on the power dissipation of the cache hierarchy. The obtained results validate the usefulness of the proposed methodology and allow the designer to efficiently design the cache hierarchy when low power constraints are involved.

Journal: Journal of Embedded Computing, vol. 1, no. 3, pp. 325-340, 2005