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Article type: Research Article
Authors: Kalvikkarasi, S.a; * | Saira Banu, S.b
Affiliations: [a] Karpagam University, Coimbatore, Tamil Nada, India | [b] Department of Electronics and Communication Systems, Karpagam University, Coimbatore, Tamil Nada, India
Correspondence: [*] Corresponding author: S. Kalvikkarasi, Karpagam University, Coimbatore, Tamil Nada, India. E-mail:kalvikkarasis0677@gmail.com
Abstract: The Welch algorithm furnishes a good estimate of the spectral power at the expense of high computational complexity. The primary intension is to compute the FFT of the individual non-overlapped parts (i.e., half of the original segments) and acquire the FFT of the overlapped segments by merging those of the non-overlapped segments. In this paper, initially the input discrete signal is subjected to an L / 2-point FFT and then the two successive segments are merged to L-point segment using a modified architecture utilizing an improved Fractional Delay Filter(FDF) design by adapting a Multiplier less implementation for efficient contribution. The merged segments are then subjected to a window filter, designed using delay lines and shifters replacing the multiplier blocks. Finally the power spectral density (PSD) is computed by computing the periodogram and then averaging the periodogram for the windowed segments. Complete module is realized using Xilinx_ISE software with the target device as xc4vfx100-12-ff1152. The design is coded in verilog HDL. The functional verification of the proposed design reported a PSD with an error of 5.87% when compared with the similar Matlab PSD computation. The synthesis results confirm the efficiency and computational complexity reduction of the proposed architecture when comparing with similar existing researches.
Keywords: Welch algorithm, fractional delay filter, periodogram, power spectral density, window filter
DOI: 10.3233/KES-160347
Journal: International Journal of Knowledge-based and Intelligent Engineering Systems, vol. 21, no. 1, pp. 39-51, 2017
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