Development of improved memory architecture FDTD/FIT dedicated computer based on SDRAM for large scale microwave simulation

Article type: Research Article

Authors: Fujita, Yuya^a | Kawaguchi, Hideki^{a; *}

Affiliations: [a] Department of Electrical and Electric Engineering, Muroran Institute of Tecnology 27-1, Mizumoto-cho, 050-8585, Muroran, Japan

Correspondence: [*] Corresponding author. E-mail: kawa@mmm.muroran-it.ac.jp

Abstract: Authors have been working in devlopment of the Finite Difference Time Domain (FDTD) / the Finite Integration Technique (FIT) dedicated computer for high performance computation of microwave simulation. Especially the dedicated computer with optimized memory access architecture was proposed to reduce overhead of Neuman bottleneck in FDTD calculation. Based on the optimized memory architecture, dedicated computer was implemented on fully customized Printed Circuit Board (PCB) by using the Field Programable Gate Array (FPGA) and asynchronous Static Random Access Memory (SRAM). This paper presents a newly developed FDTD/FIT dedicated computer based on Synchronous Dynamic Random Access Memory (SDRAM) for larger scale and higher performance simulation.

DOI: 10.3233/JAE-2010-1073

Journal: International Journal of Applied Electromagnetics and Mechanics, vol. 32, no. 3, pp. 145-157, 2010