A dedicated simulation approach for the steady-state analysis of power electronic circuits

Article type: Research Article

Authors: Tourkhani, F.^{a; *} | Viarouge, P.^b

Affiliations: [a] EMS Technologies, Space and Electronics Devision, Power Electronics Group, Ste-Anne de Bellevue, Quebec, Canada H9X 3R2. E-mail: Tourkhani.F@ems-t.ca | [b] LEEPCI, Department of Electrical and Computer Engineering, Laval University, Quebec, Canada. E-mail: viarouge@gel.ulaval.ca

Correspondence: [*] Corresponding author.

Abstract: This paper describes SUPRA (Simulator for Unified Power Regulators Analysis), a new simulation tool for the behavior mode simulation of switchmode power supplies. This simulation tool uses the variable- topology simulation method (VTSM) in conjunction with the state-space based analysis techniques. The VTSM allows a systematic reduction of the dimension of the state space equations during the simulation process. In addition, it will be shown that this simulation method is dedicated to the steady-state problem of a power converter, because it provides an automatic reduction of the number of equations and variables in the steady-state equation. The use of the variable-topology simulation process for simplifying the steady-state equation of a power converter has been led to the new concept of the steady-state variables (SSV) of a switching network. The details of the simulation method, including the steady-state analysis procedure, are described. Several examples that illustrate the operation and the performance of SUPRA are given.

DOI: 10.3233/ICA-2001-8304

Journal: Integrated Computer-Aided Engineering, vol. 8, no. 3, pp. 215-230, 2001