Affiliations: [a] HITEC University, Taxila, Pakistan | [b] Department of Electrical Engineering, COMSATS Institute of Information Technology, Wah Cantt., Pakistan | [c] Faculty of Engineering and Applied Sciences, Riphah International University, Islamabad, Pakistan | [d] School of Computer Science and Electronic Engineering, University of Essex, Colchester, UK
Abstract: The emergence of Multi Processor System on Chip (MPSoC) architectures with reconfigurable options is revolutionizing general purpose processing. Reconfigurable architectures give us the opportunity to allocate system resources with respect to specific application requirements. Reconfigurable architectures can provide high throughput and low energy consumption in a variety of applications. Resource utilization in these systems can be further optimized by using optimization algorithms. Early research in using optimization algorithms (i.e. Genetic Algorithm) for reconfigurable architecture has shown optimistic results for minimum energy consumption while taking limited Cache sizes, number of cores, CPU frequency, etc. In this paper, we have proposed an Ant Colony Optimization (ACO) based technique for reconfigurable architecture for various benchmark applications. We have also shown that the proposed ACO results in a convergent behaviour for all of the design space parameters variations. The ACO based design space exploration engine (ACODSEE) is aimed at minimizing energy consumption while considering throughput as a constraint. Unlike existing models we have arranged our design space in different clusters sets like the generalized travelling salesman problem. The design space is explored by ACODSEE using various SPLASH-2 benchmarks and results show a significant reduction in energy consumption without affecting throughput.
Keywords: Multi-objective optimization, Ant Colony Optimization, reconfigurable MPSoC
